Datasheet, V2. PMM Power Management. No Preview Available! Revision History:.
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Dt Sheet. App note ICE2B Version 1. This bias power supply board works with mortally high voltage! Furthermore, parts of the circuitry are not insulated from the line input. The user has to make sure that no danger or risk can occur for himself or for any other person while voltage is applied to this board. Dependant on the final application this converter must be protected by a fuse or any other element which can disconnect the applied maximum voltage of VDC in case of failure.
It is typically used as housekeeping power supply in professional SMPS. It provides a primary line connected output voltage as well as a secondary line isolated output voltage of 15VDC both. The sum of the output power is up to 12W shared to both outputs. One typical application is shown in figure 1 below. To achieve an ultra wide input voltage range up to VDC a transistor with V to V breakdown capability is necessary. This makes the design expensive and reduces the efficiency by its parasitics.
Due to the very high maximum input voltage of VDC and the reflected output voltage of approx. After applying the high input voltage C3 is charging across R1 to R4. Furthermore, these resistors do share the input voltage across the serial connected input electrolytic capacitors. The gate voltage of Q1 across R7 to R10 tracks the input voltage until it is clamped by D4 to approx. Due to the source follower circuitry of Q1 the maximum drain voltage for IC1 is limited around the voltage across D4.
The charge in the junction of the high voltage zener is transferred across R11 to the gate of Q1. D6 limits its maximum gate voltage to 15V. The transformers primary winding is applied to the input voltage now. Because the source of Q1 was held down by IC1 before, the gate voltage of Q1 was approx. So the fast rising drain voltage of IC1 switches off Q1 nearly in the same time when the voltage is higher than approx. The increasing voltage charges the junction of D4 across D6, R11 until it is clamping.
From now the voltage follower Q1 starts working and stops further increasing of the voltage across IC1. So any additional voltage increases across Q1 until its maximum value. Due to the primary located regulation loop the primary output voltage is quite exact and no dependant from line and load changes on the secondary side. So no clamping zener diode is required to protect the IC from over voltage. If in any application only one primary output voltage is required, the user may connect the secondary output parallel to the primary.
Figure 4 shows the primary and secondary output voltage versus V IN. Additionally, some tolerances in the rectifier diode forward voltage or temperature may cause deviation. However, the secondary unregulated output voltage under balanced load sharing tracks the primary voltage very excellent due to the optimized transformer design.
Figure 5 shows the cross load behavior of the secondary output voltage. After removing the output short the converter starts automatically. The output power limit, adjusted by the value of the current sense resistor is set to approx. By exceeding the output power above this limit the converter goes into the hiccup mode with auto restart as well as under short condition.
This avoids excessive stress from any device. By removing R5 from the board the primary regulation loop is cut off. Usually, the output voltage of any flyback converter is rising up to the energy limit, destroying the connected circuitry and the converter. The PWM controller is detecting the loss of the regulation loop and switches to the hiccup mode. Due to the interaction between soft-start capacitance, current sense resistor and start up current a tuning of these components may be necessary if starting is required at very low line.
After the converter is started, it works down to approx. Especially in high voltage or in three phase designs the total transferred power is much more than the rated power level of this bias module. Furthermore, the efficiency depends on the increasing switching losses going square with the input voltage.
Nevertheless, the overall efficiency of the converter is sufficient high. Figure 7 shows the efficieny of the converter versus input voltage at rated output power and half of the rated output power. So trough hole devices transformer, IC1, Q1, electrolytic capacitors etc. Figure 8: shows the PCB layout for the top and bottom side layer.
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